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? semiconductor components industries, llc, 2011 august, 2011 ? rev. 3 1 publication order number: asm1232lp/d asm1232lp, asm1232lps 5 v p power supply monitor and reset circuit description the asm1232lp/lps is a fully integrated microprocessor supervisor. it can halt and restart a ?hung ? up? microprocessor, restart a microprocessor after a power failure. it has a watchdog timer and external reset override. a precision temperature ? compensated reference and comparator circuits monitor the 5 v, v cc input voltage status. during power ? up or when the v cc power supply falls outside selectable tolerance limits, both reset and reset become active. when v cc rises above the threshold voltage, the reset signals remain active for an additional 250 ms minimum, allowing the power supply and system microprocessor to stabilize. the trip point tolerance signal, tol, selects the trip level tolerance to be either 5% or 10%. each device has both a push ? pull, active high reset output and an open drain active low reset output. a debounced manual reset input, pbrst , activates the reset outputs for a minimum period of 250 ms. there is a watchdog timer to stop and restart a microprocessor that is ?hung ? up?. the watchdog timeouts periods are selectable: 150 ms, 610 ms and 1200 ms. if the st input is not strobed low before the time ? out period expires, a reset is generated. devices are available in 8 ? pin dip, 16 ? pin so and compact 8 ? pin microso packages. features ? 5 v supply monitor ? selectable watchdog period ? debounce manual push ? button reset input ? precision temperature ? compensated voltage reference and comparator ? power ? up, power ? down and brown out detection ? 250 ms minimum reset time ? active low open drain reset output and active high push ? pull output ? selectable trip point tolerance: 5% or 10% ? low ? cost surface mount packages: 8 ? pin/16 ? pin so, 8 ? pin dip and 8 ? pin micro so packages ? wide operating temperature ? 40 c to +85 c (n suffixed devices) applications ? microprocessor systems ? computers ? controllers ? portable equipment ? intelligent instruments ? automotive systems http://onsemi.com pin configurations see detailed ordering and shipping information in the package dimensions section on page 12 of this data sheet. ordering information pdip ? 8 p suffix case 646aa soic ? 8 s suffix case 751bd pbrst td tol gnd v cc st reset reset asm1232lp asm1232lps ? 2 asm1232lpu 1 dip/so/microso (top view) micro ? 8 u suffix case 846aa so (top view) 1 soic ? 16 s suffix case 751bg asm1232lps nc v cc nc st nc reset nc reset nc pbrst nc td nc tol nc gnd
asm1232lp, asm1232lps http://onsemi.com 2 figure 1. typical operating circuit figure 2. block diagram
asm1232lp, asm1232lps http://onsemi.com 3 table 1. pin description pin # 8 ? pin package pin # 16 ? pin package pin name function 1 2 pbrst debounced manual pushbutton reset input. 2 4 t d watchdog time delay selection. (t td = 150 ms for t d = gnd, t td = 610 ms for t d = open, and t td = 1200 ms for t d = v cc ). 3 6 t ol selects 5% (t ol connected to gnd) or 10% (t ol connected to v cc ) trip point tolerance. 4 8 gnd ground. 5 9 reset active high reset output. reset is active: 1. if v cc falls below the reset voltage trip point. 2. if pbrst is low. 3. if st is not strobed low before the timeout period set by t d expires. 4. during power ? up. 6 11 reset active low reset output. (see reset). 7 13 st strobe input. 8 15 v cc 5 v power. 1,3,5,7,10,12,14,16 nc no internal connection. table 2. absolute maximum ratings parameter min max unit voltage on v cc (note 1) ? 0.5 7 v voltage on st , td (note 1) ? 0.5 v cc + 0.5 v voltage on pbrst , reset, reset (note 1) ? 0.5 v cc + 0.5 v operating temperature range (n suffixed devices) ? 40 +85 c operating temperature range (others) 0 70 c soldering temperature (for 10 sec) +260 c storage temperature ? 55 +125 c esd rating hbm 2 kv mm 200 v stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. 1. voltages are measured with respect to ground
asm1232lp, asm1232lps http://onsemi.com 4 table 3. dc electrical characteristics (unless otherwise stated, 4.5 v v cc 5.5 v and over the operating temperature range of 0 c to 70 c ( ? 40 c to +85 c. for n devices). all voltages are referenced to ground.) parameter symbol conditions min typ max unit supply voltage v cc 4.5 5.5 v st and pbrst input high level v ih 2 v cc + 0.3 v st and pbrst input low level v il ? 0.3 0.8 v v cc trip point (t ol = gnd) v cctp 4.50 4.62 4.74 v v cc trip point (t ol = v cc ) v cctp 4.25 4.37 4.49 v watchdog timeout period t td t d = gnd 62.5 150 250 ms watchdog timeout period t td t d = v cc 500 1200 2000 ms watchdog timeout period t td t d floating 250 610 1000 ms output voltage v oh i = ? 500 a (note 4) v cc ? 0.5 v cc ? 0.1 v output current i oh output = 2.4 v (note 3) ? 8 ? 10 ma output current i ol output = 0.4 v 10 ma input leakage i il (note 2) ? 1.0 1.0 a reset low level v ol (note 4) 0.4 v internal pull ? up resistor (note 2) 40 k operating current (cmos) i cc1 30 a input capacitance c in 5 pf output capacitance c out 10 pf pbrst manual reset minimum low time t pb pbrst = v il 20 ms reset active time t rst 250 610 1000 ms st pulse width t st (note 5) 20 ns v cc fail detect to reset or reset t rpd 5 8 s v cc slew rate t f 4.75 v to 4.25 v 300 s pbrst stable low to reset and reset active t pdly 20 ms v cc detect to reset or reset inactive t rpu t rise = 5 s 250 610 1000 ms v cc slew rate t r 4.25 v to 4.75 v 0 ns 2. pbrst is internally pulled high to v cc through a nominal 40 k resistor. 3. reset is an open drain output. 4. reset remains within 0.5 v of v cc on power ? down until v cc falls below 2 v. reset remains within 0.5 v of ground on power ? down until v cc falls below 2.0 v. 5. must not exceed the minimum watchdog time ? out period (t td ). the watchdog circuit cannot be disable d. to avoid a reset, st must be strobed.
asm1232lp, asm1232lps http://onsemi.com 5 detailed description the asm1232lp/lps monitors the microprocessor or micro controller power supply and generates reset signal, both active high and active low, that halt processor operation whenever the power supply voltage levels are outside a predetermined tolerance. reset and reset outputs reset is an active high signal developed by a cmos push ? pull output stage and is the logical opposite to reset . reset is an active low signal. it is developed with an open drain driver. a pull up resistor of typical value 10 k to 50 k is required to connect with the output. trip point tolerance selection the tol input is used to determine the level v cc can vary below 5 v without asserting a reset. with tol connected to v cc , reset and reset become active whenever v cc falls below 4.5 v. reset and reset become active when the v cc falls below 4.75 v if tol is connected to ground. after v cc has risen above the trip point set by tol, reset and reset remain active for a minimum time period of 250 ms. on power ? down, once v cc falls below the reset threshold reset stays low and is guaranteed to be 0.4 v or less until v cc drops below 1.2 v. the active high reset signal is valid down to a v cc level of 1.2 v also. tolerance select tolerance trip point voltage (v) min nom max tol = v cc 10% 4.25 4.37 4.49 tol = gnd 5% 4.5 4.62 4.74 figure 3. timing diagram: power up figure 4. timing diagram: power down
asm1232lp, asm1232lps http://onsemi.com 6 application information manual reset operation push ? button switch input, pbrst , allows the user to override the internal trip point detection circuits and issue reset signals. the pushbutton input is debounced and is pulled high through an internal 40 k resistor. when pbrst is held low for the minimum time t pb , both resets become active and remain active for a minimum time period of 250 ms after pbrst returns high . the debounced input is guaranteed to recognize pulses greater than 20 ms. no external pull ? up resistor is required, since pbrst is pulled high by an internal 40 k resistor. the pbrst can be driven from a ttl or cmos logic line or shorted to ground with a mechanical switch. figure 5. timing diagram: pushbutton reset figure 6. application circuit: pushbutton reset
asm1232lp, asm1232lps http://onsemi.com 7 watchdog timer and st input a watchdog timer stops and restarts a microprocessor that is ?hung ? up?. the p must toggle the st input within a set period (as selectable through td input) to verify proper software execution. if the st is not toggled low within the minimum timeout period, reset signals become active. in power ? up after the supply voltage returns to an in ? tolerance condition, the reset signal remains active for 250 ms minimum, allowing the power supply and system microprocessor to stabilize. st pulses as short as 20 ns can be detected. figure 7. timing diagram: strobe input timeouts periods of approximately 150 ms, 610 ms or 1,200 ms are selected through the td pin. td voltage level watchdog time ? out period (ms) min nom max gnd 62.5 150 250 floating 250 610 1000 v cc 500 1200 2000 the watchdog timer cannot be disabled. it must be strobed with a high ? to ? low transition to avoid watchdog timeout and reset. figure 8. application circuit: watchdog timer
asm1232lp, asm1232lps http://onsemi.com 8 package dimensions micro8 /tssop8 3x3 case 846aa ? 01 issue o s b m 0.08 (0.003) a s t notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. 5. 846a-01 obsolete, new standard 846a-02. b e pin 1 id 8 pl 0.038 (0.0015) ? t ? seating plane a a1 c l *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* 8x 8x 6x mm inches scale 8:1 1.04 0.041 0.38 0.015 5.28 0.208 4.24 0.167 3.20 0.126 0.65 0.0256 dim a min nom max min millimeters ?? ?? 1.10 ?? inches a1 0.05 0.08 0.15 0.002 b 0.25 0.33 0.40 0.010 c 0.13 0.18 0.23 0.005 d 2.90 3.00 3.10 0.114 e 2.90 3.00 3.10 0.114 e 0.65 bsc l 0.40 0.55 0.70 0.016 ?? 0.043 0.003 0.006 0.013 0.016 0.007 0.009 0.118 0.122 0.118 0.122 0.026 bsc 0.021 0.028 nom max 4.75 4.90 5.05 0.187 0.193 0.199 h e h e d d e
asm1232lp, asm1232lps http://onsemi.com 9 package dimensions pdip ? 8, 300 mils case 646aa ? 01 issue a e1 d a l eb b2 a1 a2 e eb c top view side view end view pin # 1 identification notes: (1) all dimensions are in millimeters. (2) complies with jedec ms-001. symbol min nom max a a1 a2 b b2 c d e e1 l 0.38 2.92 0.36 6.10 1.14 0.20 9.02 2.54 bsc 3.30 5.33 4.95 0.56 7.11 1.78 0.36 10.16 eb 7.87 10.92 e 7.62 8.25 2.92 3.80 3.30 0.46 6.35 1.52 0.25 9.27 7.87
asm1232lp, asm1232lps http://onsemi.com 10 package dimensions soic 8, 150 mils case 751bd ? 01 issue o e1 e a a1 h l c e b d pin # 1 identification top view side view end view notes: (1) all dimensions are in millimeters. angles in degrees. (2) complies with jedec ms-012. symbol min nom max a a1 b c d e e1 e h 0o 8o 0.10 0.33 0.19 0.25 4.80 5.80 3.80 1.27 bsc 1.75 0.25 0.51 0.25 0.50 5.00 6.20 4.00 l 0.40 1.27 1.35
asm1232lp, asm1232lps http://onsemi.com 11 package dimensions soic ? 16, 150 mils case 751bg ? 01 issue o top view pin#1 identification e d a e b a1 l h c e1 side view end view notes: (1) all dimensions are in millimeters. angles in degrees. (2) complies with jedec ms-012. symbol min nom max a a1 b c d e e1 e h 0o 8o 0.10 0.33 0.19 0.25 9.80 5.80 3.80 1.27 bsc 1.75 0.25 0.51 0.25 0.50 10.00 6.20 4.00 l 0.40 1.27 1.35 9.90 6.00 3.90
asm1232lp, asm1232lps http://onsemi.com 12 table 4. ordering information part number (note 6) package operating temperature range maximum supply current ( a) voltage monitoring application package marking tin ? lead devices asm1232lp 8l pdip 0 c to +70 c 30 5 v asm1232lp asm1232lpn 8l pdip ? 40 c to +85 c 30 5 v asm1232lpn asm1232lps 16l soic 0 c to +70 c 30 5 v asm1232lps asm1232lps ? 2 8l soic 0 c to +70 c 30 5 v asm1232lps ? 2 asm1232lpsn 16l soic ? 40 c to +85 c 30 5 v asm1232lpsn asm1232lpsn ? 2 8l soic ? 40 c to +85 c 30 5 v asm1232lpsn ? 2 asm1232lpu 8l msop 0 c to +70 c 30 5 v asm1232lp asm1232lpun 8l msop ? 40 c to +85 c 30 5 v asm1232lpn lead free devices asm1232lpf 8l pdip 0 c to +70 c 30 5 v asm1232lpf asm1232lpnf 8l pdip ? 40 c to +85 c 30 5 v asm1232lpnf asm1232lps ? 2f 8l soic 0 c to +70 c 30 5 v asm1232lps ? 2f asm1232lpsf 16l soic 0 c to +70 c 30 5 v asm1232lpsf asm1232lpsn ? 2f 8l soic ? 40 c to +85 c 30 5 v asm1232lpsn ? 2f asm1232lpsnf 16l soic ? 40 c to +85 c 30 5 v asm1232lpsnf asm1232lpuf 8l msop 0 c to +70 c 30 5 v asm1232lpf ASM1232LPUNF 8l msop ? 40 c to +85 c 30 5 v asm1232lpnf 6. for parts to be packed in tape and reel, add ? ? t? at the end of the part number. on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. asm1232lp/d publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative

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